AERA

SOFTWARE
ENGINEER.

● FULL-STACK WEB · IC DESIGN · SYSTEMS

● SYSTEM // ACTIVE_PORTRAITCPE '26 // MNL·REMOTE
■ 001 // OPERATOR PROFILE

BORN IN HARDWARE.
FLUENT IN SOFTWARE.

Base PH Blockchain4Youth - Presenting Aerovit
■ BLOCKCHAIN4YOUTH // UPHSL
DOST IMEC 2026 - Aerovit Presentation
■ DOST IMEC 2026 // ACACIA HOTEL
Best Thesis & Best Poster Award
■ BEST THESIS & POSTER // CDM
CDM Recognition Day 2026
■ RECOGNITION DAY 2026 // CDM

Software & IC engineer: architecting full-stack web platforms, VLSI EDA tools, and resilient systems.

CPE '26 · MNL · @AERA0908
AERA Portrait - Aira Josh Ynte
■ OPERATORAIRA JOSH YNTE
AERA.SYSB.S. COMPUTER ENGINEERING
@AERA0908
SECTOR 02 // JOURNEY

THE JOURNEY.

● 001 // EXPERIENCE LOG

● 0012026 - PRESENT

IC Layout Trainee

XINYX LABS logoXINYX LABS↗

Undergoing specialized industry training in integrated circuit (IC) physical layout design: floorplanning, standard cell layout, DRC/LVS physical verification rule decks, and parasitic extraction workflows.

  • IC Layout
  • DRC/LVS
  • Physical Design
  • VLSI
  • Semiconductor
● 0022026

Lead Web3 & Full-Stack Developer

FEHUVIA logoFEHUVIA↗

Architected an open-finance B2B treasury workstation on Morph L2: Solidity billing clearance settling T+0 in under 2 seconds, a self-healing background gas faucet, an EVM listener daemon reconciling a dual-state PostgreSQL ledger, and a GPT-4o RAG co-pilot with OCR invoice parsing.

  • Solidity
  • Morph L2
  • React 19
  • Express
  • PostgreSQL
  • GPT-4o
● 0032024 - 2026

Lead Hardware & Software Engineer

AEROVIT logoAEROVIT↗

Built a fitness-gamified smartwatch ecosystem: designed and brought up custom ESP32-S3 PCBs (QMI8658 IMU, MAX30102 heart-rate), a 33-landmark BlazePose pipeline with real-time rep and form state machines, and the AERO ERC-20 reward token on Ethereum Sepolia.

  • ESP32-S3
  • C++
  • BLE 5.0
  • MediaPipe
  • Flutter
  • Sepolia
● 0042023 - NOW

Freelance Web3 & Full-Stack Developer

VARIOUS CLIENTS

Deliver custom Web2/Web3 dashboards and database systems: secure client-side signing with MetaMask (EIP-1193), highly optimized PostgreSQL schemas, and RESTful Express microservices with strict rate-limiting and audit logging.

  • React
  • Node.js
  • Express
  • Solidity
  • PostgreSQL
  • MetaMask
● 005OJT

IC Design Intern

XINYX DESIGN logoXINYX DESIGN↗

On-the-job training in integrated circuit design and peripheral verification: SystemVerilog RTL modeling and verification of an AMBA APB3 protocol implementation.

  • SystemVerilog
  • RTL
  • AMBA APB3
  • Verification
  • Digital Logic
● 0062022 - 2026

B.S. Computer Engineering (Magna Cum Laude)

COLEGIO DE MUNTINLUPA logoCOLEGIO DE MUNTINLUPA↗

Graduated Magna Cum Laude with Best Thesis Award for 'AeroVit' (Gamified AI Fitness Platform). Specialized in embedded systems, digital signal processing, RTOS, and PCB bring-up, including muscle bio-signal (EMG) acquisition controllers.

  • Magna Cum Laude
  • Best Thesis (AeroVit)
  • Embedded Systems
  • RTOS
  • PCB
  • DSP
  • C/C++

THE VAULT.

● 002 // SELECTED BUILDS

◍OPEN PROJECT ARCHIVE // SYSTEMS + ARTS→

CREDENTIALS.

● 003 // CERTIFICATIONS & CAPABILITY MATRIX

AERA_SYS // MODULE: CREDENTIALS_DB_v2.0

$

// HARDWARE & SYSTEMS CORE
  • [OK_01] Software Development & Clean Architecture
  • [OK_02] System Design & Modular API Planning
  • [OK_03] Hardware-Software Systems Integration
  • [OK_04] Digital Logic Design & RTL Verification
  • [OK_05] Embedded Firmware & Peripherals Development
  • [OK_06] Decentralized Protocol & Smart Contract Design
// COLLABORATION & INTEGRATION MODE
  • [MOD_01] Cross-Functional Team Collaboration
  • [MOD_02] Technical Documentation & Spec Writing
  • [MOD_03] Client Communication & Iterative Feedback
  • [MOD_04] Rapid Self-Directed Technical Learning
// TECH STACK SUMMARY
LANGUAGES :: TypeScript, JavaScript, Python, C/C++, Solidity, SystemVerilog, SQL
FRAMEWORKS :: React, Next.js, Express, Tailwind CSS, Flutter, Hardhat
INFRA/TOOL :: PostgreSQL, MongoDB, Firebase, Git, Docker, KiCad, Figma
DATABASE STATUS:SYNCING ▊
TOTAL LOGS INGESTED:0 KEYS
CIPHER ALGORITHM:ECDSA-SHA256
MEM_ALLOC: [░░░░░░░░░░░░] 0%

$

FILE: ANTHROPIC_SYS.DBVERIFIED

AI FLUENCY: FRAMEWORK & FOUNDATIONS

Framing and evaluating foundations for building AI agents and workflows.

[ DOWNLOAD ]
FILE: ANTHROPIC_SYS.DBVERIFIED

INTRODUCTION TO MODEL CONTEXT PROTOCOL

MCP foundations, building custom MCP servers, and data integration.

[ DOWNLOAD ]
FILE: ANTHROPIC_SYS.DBVERIFIED

MODEL CONTEXT PROTOCOL: ADVANCED TOPICS

Advanced transports, security schemas, and enterprise MCP deployment.

[ DOWNLOAD ]
FILE: SCRIMBA_SYS.DBVERIFIED

THE AI ENGINEER PATH

AI integration, model engineering, and agent systems development.

[ DOWNLOAD ]
FILE: XINYX DESIGN ENGINEERING, INC._SYS.DBVERIFIED

ON-THE-JOB TRAINING

Digital logic design and peripheral verification: SystemVerilog RTL on AMBA APB3.

[ DOWNLOAD ]

$

LOG_IDTRAINING LOG / DETAILSISSUERUPLINKS
TR-01BLOCKCHAIN4YOUTHBITGET[DL]
TR-02LEARN REACTSCRIMBA[DL]
TR-03LEARN TAILWIND CSSSCRIMBA[DL]
TR-04BASIC WEB DEVELOPMENT WORKSHOPZUITT[DL]
TR-05TINA DESIGN SUITE WORKSHOPHYTEC POWER[DL]
TR-06UNDERSTANDING EDRCYBERSECURITY TRAINING[DL]

● 004 // UPLINK

LET'S
BUILD.

SYS_UPLINK // DOWNLOAD
SYS_UPLINK // DOWNLOAD